Intel has unveiled a mind-boggling new chip that uses optical networking technology to pack 66 threads into each core, rather than the standard two. The result is a monstrously powerful eight-core CPU with 528 threads.
Revealed at the Hot Chips 2023 conference, the 7nm prototype CPU is designed to churn through massive data processing workloads at 1TB/s. It’s the first mesh-to-mesh photonic fabric that uses silicon photonic interconnects to link chips together.
It was designed specifically for DARPA’s Hierarchical Identity Verify Exploit (HIVE) program, according to The Register. This program is looking to build a graph analytics processor with a novel architecture that can process data at lightning speeds without consuming excessive levels of power.
(Image credit: Intel)
While the CPU won’t be available commercially in its current form, it does point to an exciting direction of travel for the future of CPU architectures.
Intel’s current Instruction Set Architecture (ISA) is x86, which it developed in the late 1970s and has become the basis for almost all the best processors you can find today. But current-day CPUs run into scaling issues and aren’t efficient enough when trying to fulfill purposes such as that DARPA set out.
Intel’s latest 528-thread chip, by contrast, uses a reduced instruction set computer (RISC) architecture. These kinds of chips are well-suited to parallel processing and particularly useful for specific tasks. It’s vastly more power efficient than conventional architectures too.
The 7nm FinFET process chip is also supplied by fabrication rival TSMC, and largely resembles a normal processor. It even includes a standard ball grid array (BGA) interface such as those found on Xeon CPUs.
But the data it transmits uses silicon photonics chiplets, made in partnership with Ayar Labs, with the four chiplets converting electrical signals passing through the microprocessor into optical signals carried by 32 single-mode fibers. Each fiber carries data at 32GB/s, according to Intel, for a maximum bandwidth of 1TB/s. In testing, however, Intel only achieved half of that.
The thinking is to stitch 16 of the prototype chips together in a single Open Computer Project server in a sled form factor, with up to 10,000 sleds combined to unleash its full potential for the use case it was designed for.
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